| CPU Core
| 128-bit RISC (MIPS IV-subset)
|
| Clock Frequency
| 300 MHz
|
| Integer Unit
| 64 bit (2-way Superscalar)
|
| Multimedia Extended Instructions
| 107 instructions at 128-bit width
|
| Integer General Purpose Register
| 32 at 128-bit width
|
| TLB
| 48 double entries
|
| Instruction Cache
| 16 KB (2-way)
|
| Data Cache
| 8 KB (2-way)
|
| Scratch Pad RAM
| 16 KB (Dual port)
|
| Main Memory
| 32 MB (Direct RDRAM 2ch@800MHz)
|
| Memory Bandwidth
| 3.2 GB/ sec
|
| DMA
| 10 channels
|
| Co-processor1
| FPU (FMAC x 1, FDIV x 1)
|
| Co-processor2
| VU0 (FMAC x 4, FDIV x 1)
|
|
| Micro Memory (I:4KB D:4 KB)
|
| Vector Processing Unit
| VU1 (FMAC x 5, FDIV x 2)
|
|
| Micro Memory (I:16KB D:16KB)
|
|
|
|
| Floating Point Performance
| 6.2 GFLOPS
|
| Geometry
|
|
| + Perspective Transformation
| 66 miliion polygons / sec
|
| + Lighting
| 38 million polygons / sec
|
| + Fog
| 36 million polygons / sec
|
| Curved Surface Generation (Bezier)
| 16 million polygons/ sec
|
| Image Processing Unit
| MPEG2 Macroblock Layer Decoder
|
| Image Processing Performance
| 150 million pixels / sec
|
|
|
|
| Gate Width
| 0.18 micron
|
| VDD Voltage
| 1.8 V
|
| Power Consumption
| 15 watts
|
| Metal Layers
| 4
|
| Total Transistors
| 10.5 million
|
| Die Size
| 240 mm2
|
| Package
| 540 pin PBGA
|
